This disclosure relates to integrated circuit design, and in particular to the design of interconnect structures for interconnecting multiple components of the integrated circuit.
Many different types of component can be interconnected via an interconnect structure within an integrated circuit, to enable communications to take place between those components. Further, the data propagated between the components via the interconnect can take a wide variety of different forms, and indeed the data itself may be subjected to some processing steps whilst being routed through the interconnect. An interconnect can include a number of different elements but one of the key elements within the interconnect are the data routing elements. In particular, multiple data routing elements will be connected together to form a router network through the interconnect, the router network being configured so that any particular component being connected to the interconnect can route data to any other component connected to the interconnect that it is required to communicate with. Some data routing elements may perform pure routing functions, whilst others may additionally perform one or more processing operations on the data being routed through them.
Due to the data routing elements providing the core functionality of the interconnect, then a key step in seeking to achieve an efficient interconnect design is to provide a design for the router network of data routing elements that allows for efficient routing of data between the components connected to the interconnect. However, in modern data processing systems, where a significant number of components may be connected to the interconnect, and the individual data routing elements may provide multiple connection options (due to their multi-ported design), there are a very large number of options for configuring a router network, and it would be desirable to provide a technique that could reliably determine an efficient router network design for a desired integrated circuit.